 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| CXP84700 CMOS 8-bit Single Chip Microcomputer Description The CXP84700 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP84716/84720/84724. Piggyback/ evaluator 100 pin PQFP (Ceramic) Features * A wide instruction set (213 instructions) which LQFP supported QFP supported covers various types of data. --16-bit operation/multiplication and division/ Boolean bit operation instructions * Minimum instruction cycle 333ns at 12MHz operation (3.0 to 5.5V) 250ns at 16MHz operation (4.5 to 5.5V) * Applicable EPROM LCC type 27C512 (Maximum 60K bytes are available.) * Incorporated RAM capacity 2144 bytes * Peripheral functions -- A/D converter 8 bits, 8 channels, successive approximation method (Conversion time of 1.6s/16MHz) -- Serial interface Start-stop sync type (UART), 1 channel Incorporated buffer RAM (Auto transfer for 1 to 32 bytes), 2 channels 8-bit clock sync type (MSB/LSB first selectable), 1 channel -- Timer 8-bit timer, 8-bit timer/counter, 19-bit time base timer, 16-bit capture timer/counter -- High precision timing pattern generator PPG: maximum of 11-pins, 16-stages programmable, 2 channels -- PWM output 8 bits, 8 channels -- FRC capture unit Incorporated 24-bit and 6-stage FIFO * Interruption 19 factors, 15 vectors, multi-interruption possible * Standby mode Sleep/stop * Package 100-pin ceramic PQFP Note) Mask option depends on the type of the CXP84700. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E96Z12-PS CXP84700 Pin Assignment in Piggyback Mode (QFP package) PG7/PWM7 PG6/PWM6 PG5/PWM5 PG4/PWM4 PG3/PWM3 PG2/PWM2 PG1/PWM1 PG0/PWM0 PI5/SCK2 PI7/SO2 PF2 PF1 PF0 VDD 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PF3 PF4 PF5 PF6/TxD PF7/RxD PD0/PPO0 PD1/PPO1 PD2/PPO2 PD3/PPO3 PD4/PPO4 PD5/PPO5 PD6/PPO6 PD7/PPO7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0/PPO8 PH1/PPO9 PH2/PPO10 PH3/PPO11 PH4/PPO12 PH5/PPO13 PH6/PPO14 PH7/PPO15 PJ0/PPO16 1 2 3 4 5 6 7 80 79 78 77 76 75 74 PI1/INT1 PI0/INT0 PE7/TO PE6 PE5 PE4 PE3/NMI PE2 PE1/EC1 PE0/EC0 PB7/SO1 PB6/SI1 PB5/SCK1 PB4/CS1 PB3 PB2 PB1 PB0/CINT SO0 SI0 SCK0 CS0 PA7 PA6 PA5 PA4 PA3/AN7 PA2/AN6 PA1/AN5 PA0/AN4 NC VSS A12 A15 A14 VDD A13 PI6/SI2 PI4/INT4 PI3/INT3 PI2/INT2 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 9 10 11 12 13 14 15 16 17 18 19 20 21 4 A6 A5 A4 A3 A2 A1 A0 NC D0 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC OE A10 CE D7 D6 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 GND NC D1 D2 D3 D4 D5 22 A7 8 NC AVss EXI3 EXI2 AVREF PJ1/PPO17 Note) 1. NC (Pin 90) is left open. 2. VSS (Pins 41 and 88) are both connected to GND. PJ2/PPO18 PJ3/PPO19 PJ4/PPO20 PJ5/PPO21 PJ6/EXI0 PJ7/EXI1 EXTAL XTAL -2- AVDD RST AN0 AN1 AN2 AN3 Vss CXP84700 Pin Assignment in Piggyback Mode (LQFP package) PG7/PWM7 PG6/PWM6 PG5/PWM5 PG4/PWM4 PG3/PWM3 PG2/PWM2 PG1/PWM1 PG0/PWM0 PI5/SCK2 PI7/SO2 PI4/INT4 PI3/INT3 PI2/INT2 PI1/INT1 PI0/INT0 PF4 PF3 PF2 PF1 PF0 VDD 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 NC Vss PI6/SI2 PE7/TO PF5 PF6/TxD PF7/RxD PD0/PPO0 PD1/PPO1 PD2/PPO2 PD3/PPO3 PD4/PPO4 PD5/PPO5 PD6/PPO6 PD7/PPO7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0/PPO8 PH1/PPO9 PH2/PPO10 PH3/PPO11 PH4/PPO12 PH5/PPO13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD A14 A13 A8 A9 A11 OE A10 CE D7 D6 D5 D4 D3 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 PE6 PE5 PE4 PE3/NMI PE2 PE1/EC1 PE0/EC0 PB7/SO1 PB6/SI1 PB5/SCK1 PB4/CS1 PB3 PB2 PB1 PB0/CINT SO0 SI0 SCK0 CS0 PA7 PA6 PA5 PA4 PA3/AN7 PA2/AN6 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 PH6/PPO14 PH7/PPO15 Note) 1. NC (Pin 88) is left open. 2. VSS (Pins 39 and 86) are both connected to GND. PJ0/PPO16 PJ1/PPO17 PJ2/PPO18 PJ3/PPO19 PJ4/PPO20 PJ5/PPO21 PJ6/EXI0 PJ7/EXI1 -3- PA0/AN4 PA1/AN5 AVss EXI3 EXI2 AVREF AVDD EXTAL XTAL RST AN0 AN1 AN2 AN3 Vss CXP84700 Pin Assignment in Evaluator Mode (QFP package) PG7/PWM7 PG6/PWM6 PG5/PWM5 PG4/PWM4 PG3/PWM3 PG2/PWM2 PG1/PWM1 PG0/PWM0 PI5/SCK2 PI7/SO2 PF2 PF1 PF0 VDD 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 PF3 PF4 PF5 PF6/TxD PF7/RxD PD0/PPO0 PD1/PPO1 PD2/PPO2 PD3/PPO3 PD4/PPO4 PD5/PPO5 PD6/PPO6 PD7/PPO7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0/PPO8 PH1/PPO9 PH2/PPO10 PH3/PPO11 PH4/PPO12 PH5/PPO13 PH6/PPO14 PH7/PPO15 PJ0/PPO16 1 2 3 4 5 6 80 79 78 77 76 75 PI1/INT1 PI0/INT0 PE7/TO PE6 PE5 PE4 PE3/NMI PE2 PE1/EC1 PE0/EC0 PB7/SO1 PB6/SI1 PB5/SCK1 PB4/CS1 PB3 PB2 PB1 PB0/CINT SO0 SI0 SCK0 CS0 PA7 PA6 PA5 PA4 PA3/AN7 PA2/AN6 PA1/AN5 PA0/AN4 NC VSS PI6/SI2 PI4/INT4 PI3/INT3 PI2/INT2 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 A7/D7 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 A12 A15 4 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 NC RD 5 6 7 8 9 10 11 12 13 3 2 NC 1 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A11 NC HALT A10 E/P I/T MON 14 15 16 17 18 19 20 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 SYNC GND RST WR NC C2 C1 22 A14 VDD A13 AVss EXI3 EXI2 AVREF Note) 1. NC (Pin 90) is left open. 2. VSS (Pins 41 and 88) are both connected to GND. PJ1/PPO17 PJ2/PPO18 PJ3/PPO19 PJ4/PPO20 PJ5/PPO21 PJ6/EXI0 PJ7/EXI1 EXTAL -4- XTAL AVDD RST AN0 AN1 AN2 AN3 Vss CXP84700 Pin Assignment in Evaluator Mode (LQFP package) PG7/PWM7 PG6/PWM6 PG5/PWM5 PG4/PWM4 PG3/PWM3 PG2/PWM2 PG1/PWM1 PG0/PWM0 PI5/SCK2 PI7/SO2 PI4/INT4 PI3/INT3 PI2/INT2 PI1/INT1 PI0/INT0 PF4 PF3 PF2 PF1 PF0 VDD 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 NC Vss PI6/SI2 PE7/TO PF5 PF6/TxD PF7/RxD PD0/PPO0 PD1/PPO1 PD2/PPO2 PD3/PPO3 PD4/PPO4 PD5/PPO5 PD6/PPO6 PD7/PPO7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PH0/PPO8 PH1/PPO9 PH2/PPO10 PH3/PPO11 PH4/PPO12 PH5/PPO13 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 A15 A12 A7/D7 A6/D6 A5/D5 A4/D4 A3/D3 A2/D2 A1/D1 A0/D0 RD WR SYNC GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VDD A14 A13 A8 A9 A11 HALT A10 E/P I/T MON RST C1 C2 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 PE6 PE5 PE4 PE3/NMI PE2 PE1/EC1 PE0/EC0 PB7/SO1 PB6/SI1 PB5/SCK1 PB4/CS1 PB3 PB2 PB1 PB0/CINT SO0 SI0 SCK0 CS0 PA7 PA6 PA5 PA4 PA3/AN7 PA2/AN6 PH6/PPO14 Note) 1. NC (Pin 88) is left open. 2. VSS (Pins 39 and 86) are both connected to GND. PH7/PPO15 PJ0/PPO16 PJ1/PPO17 PJ2/PPO18 PJ3/PPO19 PJ4/PPO20 PJ5/PPO21 PJ6/EXI0 PJ7/EXI1 -5- PA0/AN4 PA1/AN5 AVss EXI3 EXI2 XTAL AVREF AVDD EXTAL RST AN0 AN1 AN2 AN3 Vss CXP84700 EPROM Read Timing (Ta = -20 to +75C, VDD = 3.0 to 5.5V, Vss = 0V reference) Item Address data input delay time Address data hold time Symbol Pin A0 to A15 D0 to D7 A0 to A15 D0 to D7 0 Min. Max. 1001 752 Unit ns ns tACC tIH 1 At 12MHz operation (VDD = 4.5 to 5.5V) 2 At 12MHz operation (VDD = 3.0 to 5.5V), at 16MHz operation (VDD = 4.5 to 5.5V) 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD Input data 0.2VDD D0 to D7 Products List Products Option item Mask product CXP84716 CXP84720 CXP84724 Package ROM capacity Pull-up resistor for reset pin Power-on-reset circuit 100-pin plastic QFP/LQFP 16K bytes 20K bytes 24K bytes Piggyback/evaluator product CXP84700-U01Q CXP84700-U01R 100-pin ceramic PQFP EPROM 60K bytes 27C512 x 1 Existent Existent Existent/Non-existent Existent/Non-existent -6- CXP84700 Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking LCC type EPROM Pin 1 marking Pin 1 index Note) CPU probe EPROM adaptor Pin 1 marking Note) Evaluation cap should be connected to CPU probe. Pin 1 index CPU probe for LQFP -7- CXP84700 Package Outline Unit: mm 100PIN PQFP (CERAMIC) PIN NO. 1 INDEX INDEX 100 18.7 16.3 0.2 81 81 100 PIN No. 1 INDEX 1 80 80 1 0.65 0.05 4.5 1.27 0.13 22.3 0.25 18.12 0.2 12.02 14.22 24.7 6.0 0.3 1.0 0.7 30 51 51 30 31 9.48 11.66 15.58 0.2 50 1.3 0.3 50 0.45 31 PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE PQFP-100C-L01 AQFP100-C-0000-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT CERAMIC GOLD PLATING 42 ALLOY 5.7g 3.57 0.36 JEDEC CODE + 0.05 0.15 - 0.02 0.50 0.25 100PIN PQFP (CERAMIC) 16.0 0.4 14.0 0.2 75 76 0.5 0.05 51 12.4 50 0.5 0.05 3.2 0.2 1.5 0.8 0.2 26 10.44 MAX 0.3 0.08 + 0.08 0.18 - 0.03 INDEX 12.0 0.15 + 0.08 0.18 - 0.03 100 1 INDEX 12.8 0.2 25 PACKAGE STRUCTURE PACKAGE MATERIAL CERAMIC GOLD PLATING 42 ALLOY 2.2g + 0.05 0.127 - 0.02 + 0.15 0.2 - 0.13 6.9 SONY CODE EIAJ CODE JEDEC CODE PQFP-100C-L02 AQFP100-C-1414-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT 3.32 -8- 12.0 0.15 |
Price & Availability of CXP84700
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |